![]() The inputs of first flip flop are connected to HIGH (logic 1), which makes the flip flop to toggle, for every clock pulse entered into it. The significance of using JK flip flop is that it can toggle its state if both the inputs are high, depending on the clock pulse. External clock pulse is connected to all the flip flops in parallel.įor designing the counters JK flip flop is preferred. The 4 bit up counter shown in below diagram is designed by using JK flip flop. ![]() There are many types of synchronous counters available in digital electronics.
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